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SY88973BL
3.3V 3.2Gbps CML Low Power Limiting Post Amplifier with TTL LOS
General Description
The SY88973BL low-power, limiting post amplifier is designed for use in fiber optic receivers. The device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88973BL quantizes these signals and outputs typically 800mVPP voltage-limited waveforms. The SY88973BL operates from a single +3.3V 10% power supply, over an industrial temperature range of -40C to +85C. With its wide bandwidth and high gain, signals with data rates up to 3.2Gbps and as small as 10mVPP can be amplified to drive devices with CML inputs or AC-coupled PECL inputs. The SY88973BL incorporates a loss-of-signal (LOS), opencollector TTL output with external 4.75k to 10k pull-up resistor to fully comply with SFP MSA. A programmable, lossof-signal level-set pin (LOSLVL) sets the sensitivity of the input amplitude detection. LOS asserts high if the input amplitude falls below the threshold sets by LOSLVL and deasserts low otherwise. LOS can be fed back to the enable (/EN) input to maintain output stability under a loss-of-signal condition. /EN de-asserts the true output signal without removing the input signal. Typically, 4.6dB LOS hysteresis is provided to prevent chattering. Please see Micrel's website at www.micrel.com for a complete selection of optical module ICs. All support documentation can be found on Micrel's web site at: www.micrel.com.
Features
* * * * * Multi-rate up to 3.2Gbps operation Wide gain-bandwidth product 38dB differential gain 2GHz 3dB bandwidth Low noise 50 CML data outputs - 800mVPP output swing - 60ps edge rates - 5psRMS typ. random jitter - 15psPP typ. deterministic jitter
* Chatter-free, Loss-of-Signal (LOS) output - No internal pull-up resistor- fully compliant with SFP MSA - 4.6dB electrical hysteresis - OC-TTL output * Programmable LOS sensitivity using single external resistor * Internal 50 data input termination * TTL /EN input allows feedback from LOS * Wide operating range: - Single 3.3V 10% - -40C to +85C industrial temperature range * Available in a tiny 3mm x 3mm 16-pin QFN package
Applications
* 1.25Gbps and 2.5Gbps Gigabit Ethernet * 1.062Mbps and 2.125Gbps Fibre Channel * 155Mbps, 622Gbps, 1.25Gbps, and 2.5Gbps SONET/SDH * Gigabit interface converter (GBIC) * Small form factor (SFF) and small form factor pluggable (SFP) transceivers * Parallel 10G Ethernet * High-gain line driver and line receiver
Typical Performance
Markets
* Telecom/datacom * Optical transceiver
Micrel Inc. * 2180 Fortune Drive * San Jose, CA 95131 * USA * tel +1 (408) 944-0800 * fax + 1 (408) 474-1000 * http://www.micrel.com
February 2007
M9999-020207-A hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88973BL
Typical Application Circuit
Ordering Information(1)
Part Number SY88973BLMG
(3)
Package Type QFN-16
(2, 3)
Operating Range Industrial Industrial
Package Marking 973B with Pb-Free bar-line indicator 973B with Pb-Free bar-line indicator
Lead Finish Pb-Free Matte-Sn Pb-Free Matte-Sn
SY88973BLMGTR
Notes:
QFN-16
1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package is recommended for new designs.
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SY88973BL
Pin Configuration
16-pin QFN
Pin Description
Pin Number (QFN) 15 1, 4 6 14 Pin Name /EN DIN, /DIN REF LOSLVL Input: Default is maximum sensitivity Ground Open Collector TTL Output Differential CML Output Power Supply Type TTL Input: Default is high. Differential Data Input Pin Function Enable: De-asserts true data output when high. Incorporates 25k pull-up to VCC. Differential data input. Each pin internally terminates to REF through 50 . Reference Voltage: Bypass with 0.01F low ESR capacitor from REF to VCC to stabilize LOSLVL and REF. Loss-of-Signal Level Set: A resistor from this pin to VCC sets the threshold for the data input amplitude at which the LOS output will be asserted. Device ground. Exposed pad must be soldered (or equivalent) to the same potential as the ground pins. Loss-of-Signal: asserts high when the data input amplitude falls below the threshold set by LOSLVL. For proper operation, connect an external 4.75k to 10k pull-up resistor between this pin and Vcc. Differential data output. Positive power supply. Bypass with 0.1F|| 0.01F low ESR capacitors. 0.01F capacitors should be as close as possible to VCC pins.
2, 3, 10, 11 Exposed Pad 7
GND LOS
9, 12 5, 8, 13, 16
DOUT, /DOUT VCC
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SY88973BL
Functional Block Diagram
February 2007
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SY88973BL
Absolute Maximum Ratings(1)
Supply Voltage (VCC) ........................................... 0V to 4.0V /EN, LOSLVL Voltage ........................................... 0V to VCC REF Current ................................................................ 1mA LOS Current ................................................................ 5mA DOUT, /DOUT Current .............................................. 25mA DIN, /DIN Current ...................................................... 10mA Lead Temperature (soldering, 20sec.) ....................... 260C Storage Temperature (Ts) ......................... -65C to +150C
Operating Ratings(2)
Supply Voltage (VCC)................................. +3.0V to +3.6V Ambient Temperature (TA) ....................... -40C to +85C Junction Temperature (TJ) ..................... -40C to +120C Package Thermal Resistance QFN JA (Still-Air) ................................................. 61C/W JB .............................................................. 38C/W
DC Electrical Characteristics
VCC = 3.0V to 3.6V; TA = -40C to +85C, typical values at VCC = 3.3V, TA = 25C.
Symbol ICC VREF VLOSLVL VOH VOL VOFFSET ZO ZI Parameter Power Supply Current REF Voltage LOSLVL Voltage Range Output HIGH Voltage Output LOW Voltage Differential Output Offset Single-Ended Output Impedance Single-Ended Input Impedance Note 6 Note 6 Note 6 40 40 50 50 VREF VCC-0.020 VCC-0.475 VCC-0.005 VCC-0.400 Condition Note 4 Note 5 Min Typ 28 45 VCC-1.3 VCC VCC VCC-0.350 80 60 60 Max 42 62 Units mA mA V V V V mV
TTL DC Electrical Characteristics
VCC = 3.0V to 3.6V; TA = -40C to +85C.
Symbol IOH VOL VIH VIL IIH IIL
Notes: 1. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Thermal performance assumes the use of 4-layer PCB. Exposed pad must be soldered (or equivalent) to the device's most negative potential on the PCB. 4. Excludes current of CML output stage. See "Detailed Description." 5. Total device current with no output load. 6. Output levels are based on a 50 to VCC load impedance. If the load impedance is different, the output level will be changed. Amplifier is in limiting mode.
Parameter LOS Output Leakage LOS Output LOW Level /EN Input HIGH Voltage /EN Input LOW Voltage /EN Input HIGH Current /EN Input LOW Current
Condition VOH = 3.6V Sinking 2mA
Min
Typ
Max 100 0.5
Units uA V V V A A uA
2.0 0.8 VIN = 2.7V VIN = VCC VIN = 0.5V -300 20 100
February 2007
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SY88973BL
AC Electrical Characteristics(4)
VCC = 3.0V to 3.6V; TA = -40C to +85C, RLOAD = 50 to VCC; typical values at VCC = 3.3V, TA = 25C.
Symbol PSRR tr , tf tJITTER VID VOD HYS tOFF tON VSR B-3dB AV(Diff) S21
Notes: 7. 8. 9. Amplifier in limiting mode. Input is a 200MHz square wave, tr < 300ps. Deterministic jitter measured using 2.488Gbps K28.5 pattern, VID = 10mVPP. Random jitter measured using 2.488Gbps K28.7 pattern, VID = 10mVPP. Electrical signal.
Parameter Power Supply Rejection Ratio Output Rise/Fall Times (20% to 80%) Deterministic Random Differential Input Voltage Swing Differential Output Voltage Swing LOS Hysteresis LOS Release Time LOS Assert Time LOS Sensitivity Range -3dB Bandwidth Differential Voltage Gain Single-Ended Small-Signal Gain
Condition Note 7 Note 8
Min
Typ 35 60 15 5
Max 120
Units dB ps psPP psRMS
10 Note 7 Note 9 700 2 800 4.6 0.1 0.2 Note 10 10 2.0 32 26 38 32
1800 950 8 0.5 0.5 35
mVPP mVPP dB s s mVPP GHz dB dB
10. This is the detectable range of input amplitudes that can assert LOS. The input amplitude to de-assert LOS is 2-8dB higher than the assert amplitude. See "Typical Operating Characteristics" for graphs showing how to choose a particular VLOSLVL or RLOSLVL for a particular LOS assert, and its associated de-assert amplitude. If increased LOS sensitivity and hysteresis are required, an application note entitled: "Notes on Sensitivity and Hysteresis in Micrel Post Amplifiers" is available at http://www.micrel.com/_PDF/HBW/App-Notes/an-45.pdf.
February 2007
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SY88973BL
Typical Operating Characteristics
VCC = 3.3V, TA = 25C, RLOAD = 50 to VCC, unless otherwise noted.
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SY88973BL stability under a loss of signal condition. /EN de-assert low the true output signal without removing the input signals. Typically, 4.6dB LOS hysteresis is provided to prevent chattering. Loss-of-Signal Level Set A programmable, loss-of-signal level set pin sets the threshold of the input amplitude detection. Connecting an external resistor between VCC and LOSLVL sets the voltage at LOSLVL. This voltage ranges from VCC to VREF. The external resistor creates a voltage divider between VCC and REF as shown in Figure 6. If desired, an appropriate external voltage may be applied rather than using a resistor. The relationship between VLOSLVL and RLOSLVL is given by:
Description
The SY88973BL low-power, limiting post amplifier operates from a single +3.3V 10% power supply, over an industrial temperature range of -40C to +85C. Signals with data rates up to 3.2Gbps and as small as 10mVPP can be amplified. Figure 1 shows the allowed input voltage swing. The SY88973BL generates a LOS output, providing feedback to /EN for output stability. LOSLVL sets the sensitivity of the input amplitude detection. Input Amplifier/Buffer The SY88973BL's inputs are internally terminated with 50-to-REF. Unless unaffected by this internal termination scheme, upstream devices need to be AC-coupled to the SY88973BL's inputs. Figure 2 shows a simplified schematic of the input structure. The high sensitivity of the input amplifier detects and amplifies signals as small as 10mVPP. The input amplifier allows input signals as large as 1800mVPP. Input signals are linearly amplified with a typical 38dB differential voltage gain. Since it is a limiting amplifier, the SY88973BL outputs, typically 800mVPP, voltage-limited waveforms for input signals that are greater than 10mVPP. Applications requiring the SY88973BL to operate with high gain should have the upstream TIA placed as close as possible to the SY88973BL's input pins to ensure the device's best performance. Output Buffer The SY88973BL's CML output buffer is designed to drive 50 lines. The output buffer requires appropriate termination for proper operation. An external 50 resistor to-VCC or equivalent for each output pin provides this. Figure 3 shows a simplified schematic of the output structure and includes an appropriate termination method. Of course, driving a downstream device with a CML input that is internally terminated with 50 -to-VCC eliminates the need for external termination. As noted in the previous section, the amplifier outputs, typically, 800mVPP, waveforms across 25 total loads. The output buffer, thus, switches typically 16mA tail-current. Figure 4 shows the power supply current measurement which excludes the 16mA tail-current. Loss-of-Signal (LOS) The SY88973BL incorporates a chatter-free, LOS opencollector TTL output. For proper operation, an external 4.75k to 10k pull-up resistor between LOS and Vcc is required. LOS is used to determine that the input amplitude is too small to be considered a valid input. LOS asserts high if the input amplitude falls below the threshold set by LOSLVL and de-asserts low otherwise. LOS can be fed back to the enable (/EN) input to maintain output
V LOSLVL = VCC - 1.3
R LOSLVL R LOSLVL + 2.8
where voltages are in volts and resistances are in k. The smaller the external resistor, which implies a smaller voltage difference from LOSLVL to VCC, the lower the LOS sensitivity. Hence, larger input amplitude is required to deassert LOS. The "Typical Operating Characteristics" section contains graphs showing the relationship between the input amplitude detection sensitivity and VLOSLVL or RLOSLVL. Hysteresis The SY88973BL provides typically 4.6dB LOS electrical hysteresis. By definition, a power ratio measured in dB is 10log (power ratio). Power is calculated as V2IN/R for an electrical signal. Hence, the same ratio can be stated as 20log (voltage ratio). While in linear mode, the electrical voltage input changes linearly with the optical power and the ratios change linearly as well. Therefore, the optical hysteresis in dB is half the electrical hysteresis in dB given in the datasheet. The SY88973BL provides typically 2.3dB LOS optical hysteresis. As the SY88973BL is an electrical device, this datasheet refers to hysteresis in electrical terms. With 4.6dB LOS hysteresis, a voltage factor of 1.7 is required to de-assert LOS. Hysteresis and Sensitivity Improvement If increased LOS sensitivity and hysteresis are required, an application note entitled "Notes on Sensitivity and Hysteresis in Micrel Post Amplifiers" is available at: http://www.micrel.com/_PDF/HBW/App-Notes/an-45.pdf.
February 2007
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Micrel, Inc.
SY88973BL
Figure 1. VIS and VID Definition
Figure 2. Input Structure
Figure 3. Output Structure
Figure 5. LOS Output Structure
Figure 4. Power Supply Current Measurement Figure 6. LOSLVL Setting Circuit
February 2007
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M9999-020207-A hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88973BL
Package Information
16-Pin QFN
February 2007
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Micrel, Inc.
SY88973BL
PCB Thermal Consideration for 16-Pin QFN Package (Always solder, or equivalent, the exposed pad to the PCB)
Package Notes: 1. Package meets Level 2 qualification. 2. All parts are dry-packaged before shipment. 3. Exposed pad must be soldered to a ground for proper thermal management; solder void has to be less than 50% of the epad area.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2007 Micrel, Incorporated.
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